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Evaluation Kit - MMPF0100, 14 Channel Configurable PMIC

KITPF0100EPEVBE Active

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KITPF0100EPEVBE is the evaluation board for the NXP® MMPF0100 Power Management Integrated Circuit (PMIC) in a standalone environment.

Evaluate the MMPF0100 under specific operating parameters through the integrated USB to I²C communication and GUI software. The software enables easy communication between a user's PC and the evaluation board and allows you to configure and control the regulators and to program the one-time programmable (OTP) registers. The schematic and layout are provided as a reference to help expedite your system design.

NXP recommends the use of the KITPF0100SKTEVBE to support programming and verification of the MMPF0100 devices, while using the KITPFPGMEVME.

Supported Devices

Power Management

PMICs

  • MMPF0100: 14-Channel Configurable PMIC

Features

Size

  • Terminal block connectors with 2.5 mm screws allow easy connections for bench evaluation

General Specifications

  • Embedded USB to I²C interface to access device registers
  • LED indicators for easy monitoring of PMIC and programming status
  • Standard Mini-USB connector for communication with PC
  • Numerous test points provide easy access for monitoring all power and signal nodes
  • Four layer board layout supports standard design rules
  • Top side board component placement for MMPF0100
  • GUI software allows user to:
    • Configure regulator voltages and start up sequences
    • Save and recall MMPF0100 configuration files
    • Develop configuration macros with a powerful scripting tool

Buy Options

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  • KITPF0100EPEVBE
    Active

  • Evaluation Kit - MMPF0100, 14 Channel Configurable Power Management Integrated Circuit.

    • KITPF0100EPEVBE Hardware
    • Quick Reference Guide
  • $270.25 USD
  • For a quantity of 1
    • Availability: Pending Stock
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N true 0 TSPKITPF0100EPEVBEen 7 Application Note Application Note t789 1 Data Sheet Data Sheet t520 1 Errata Errata t522 1 User Guide User Guide t792 4 en_US 2 1 5.0 English The KITPF0100EPEVBE evaluation board supports the development and testing of the PF0100 PMIC, a member of NXP&#8217;s i.MX6 family of application processors. 1353105260274715674347 TSP 3.9 MB None None documents Y None 1353105260274715674347 /docs/en/user-guide/KTPF0100UG.pdf 3909891 /docs/en/user-guide/KTPF0100UG.pdf KTPF0100UG N N 2012-11-16 KTPF0100UG, KITPF0100EPEVBE Evaluation Board - User&#8217;s Guide /docs/en/user-guide/KTPF0100UG.pdf /docs/en/user-guide/KTPF0100UG.pdf User Guide N Y 132339537837198660 2023-06-19 pdf N en Aug 13, 2015 User Guide t792 User Guide User Guide Y N KTPF0100UG, KITPF0100EPEVBE Evaluation Board - User&#8217;s Guide 2 1.0 English NXP recommends the KITPFPGMEVME development tool, also known as the PF Programmer, for configuring and programming the PF0100 Power Management Integrated Circuit. This PMIC is designed primarily for use with NXP&#8217;s i.MX6 series of application processors. 1370555349638725684574 TSP 1.3 MB None None documents Y None 1370555349638725684574 /docs/en/user-guide/KTPF0100SKTUG.pdf 1283694 /docs/en/user-guide/KTPF0100SKTUG.pdf KTPF0100SKTUG N N 2016-10-31 KITPF0100SKTEVBE Programming Socket - User Guide /docs/en/user-guide/KTPF0100SKTUG.pdf /docs/en/user-guide/KTPF0100SKTUG.pdf User Guide N Y 132339537837198660 2022-12-07 pdf N en Jun 4, 2013 User Guide t792 User Guide User Guide Y N KITPF0100SKTEVBE Programming Socket - User Guide false en_US 2 3 1.0 English The KITPFPGMEVME development tool, also known as the PF Programmer, is a standalone device designed for configuring and programming the SMARTMOS<sup>&#174;</sup> PF Family of Power Management Integrated Circuit devices. It is designed to control and program PF devices on customer application boards through an 8-pin header interface, as well as the KITPF0100SKTEVBE programming socket device for OTP programming of standalone PF devices. 1387571519015716601663 TSP 265.7 KB None None documents Y None 1387571519015716601663 /docs/en/user-guide/KTPFPGHWUG.pdf 265703 /docs/en/user-guide/KTPFPGHWUG.pdf KTPFPGHWUG N N 2013-12-20 KITPFPGMEVME Rev B Programmer - User Guide /docs/en/user-guide/KTPFPGHWUG.pdf /docs/en/user-guide/KTPFPGHWUG.pdf User Guide N 132339537837198660 2023-06-19 pdf N en Dec 20, 2013 User Guide t792 User Guide User Guide N N KITPFPGMEVME Rev B Programmer - User Guide 4 1.0 English The KITPFGUI 4.0 is a flexible and easy-to-use Graphical User Interface (GUI), created to control and configure the customer evaluation boards and development tools provided by NXP to support the PF series of Power Management Integrated Circuits (PMIC) powered by SMARTMOS<sup>&#174;</sup> technology. 1387571727193716838847 TSP 1.7 MB None None documents Y None 1387571727193716838847 /docs/en/user-guide/KTPFSWUG4.pdf 1655278 /docs/en/user-guide/KTPFSWUG4.pdf KTPFSWUG4 N N 2013-12-20 KITPFGUI 4.0 Graphical User Interface - User Guide /docs/en/user-guide/KTPFSWUG4.pdf /docs/en/user-guide/KTPFSWUG4.pdf User Guide N 132339537837198660 2022-12-07 pdf N en Dec 19, 2013 User Guide t792 User Guide User Guide Y N KITPFGUI 4.0 Graphical User Interface - User Guide false en Data Sheet Data Sheet 1 5 MMPF0100F0AEP,MMPF0100F0ANES,MMPF0100F0EP,MMPF0100F1AEP,MMPF0100F1EP,MMPF0100F2AEP,MMPF0100F2EP,MMPF0100F3AEP,MMPF0100F3ANES,MMPF0100F4AEP,MMPF0100F4ANES,MMPF0100F6AEP,MMPF0100F6ANES,MMPF0100F9ANES,MMPF0100FAANES,MMPF0100NPAEP,MMPF0100NPANES,MMPF0100NPEP 20 English The PF0100 SMARTMOS power management integrated circuit (PMIC) provides a highly programmable/ configurable architecture, with fully integrated power devices and minimal external components. 1346781267650740071933 TSP 1.4 MB None None documents None 1346781267650740071933 /docs/en/data-sheet/MMPF0100.pdf 1444679 /docs/en/data-sheet/MMPF0100.pdf MMPF0100 documents N N 2017-01-24 MMPF0100, 14 Channel Configurable Power Management Integrated Circuit - Data Sheet /docs/en/data-sheet/MMPF0100.pdf /docs/en/data-sheet/MMPF0100.pdf Data Sheet N 980000996212993340 2023-08-23 pdf N en May 24, 2022 980000996212993340 Data Sheet Y N MMPF0100, 14 Channel Configurable Power Management Integrated Circuit - Data Sheet Application Note Application Note 1 6 5.0 English This document describes good practices for the layout of PF0100 and PF0200 devices on printed circuit boards. Though the guidelines are applicable to PF0100 and PF0200, reference is made only to the PF0100 throughout the document for simplicity. 1352739056918707685326 TSP 373.8 KB Registration without Disclaimer None documents Extended 1352739056918707685326 /secured/assets/documents/en/application-note/AN4622.pdf 373767 /secured/assets/documents/en/application-note/AN4622.pdf AN4622 documents Y N 2016-10-31 AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note /webapp/Download?colCode=AN4622 /secured/assets/documents/en/application-note/AN4622.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 2, 2015 645036621402383989 Application Note Y N AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note Errata Errata 1 7 5.0 English This errata document applies to the mask 1N47F, 1N18J SMARTMOS<sup>&#174;</sup> devices. 1349718571542735235777 TSP 265.2 KB None None documents None 1349718571542735235777 /docs/en/errata/MMPF0100ER.pdf 265186 /docs/en/errata/MMPF0100ER.pdf MMPF0100ER documents N N 2016-10-31 MMPF0100 Errata for Mask 1N47F and 1N18J - Errata /docs/en/errata/MMPF0100ER.pdf /docs/en/errata/MMPF0100ER.pdf Errata N 155452329886410597 2022-12-07 pdf N en Apr 15, 2014 155452329886410597 Errata Y N MMPF0100 Errata for Mask 1N47F and 1N18J - Errata false 0 KITPF0100EPEVBE downloads en true 0 Y TSP Application Note 1 /secured/assets/documents/en/application-note/AN4622.pdf 2016-10-31 1352739056918707685326 TSP 6 Jun 2, 2015 Application Note This document describes good practices for the layout of PF0100 and PF0200 devices on printed circuit boards. Though the guidelines are applicable to PF0100 and PF0200, reference is made only to the PF0100 throughout the document for simplicity. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4622.pdf English documents 373767 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN4622 AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note /secured/assets/documents/en/application-note/AN4622.pdf documents 645036621402383989 Application Note N en Extended Y pdf 5.0 Y N AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note 373.8 KB AN4622 N 1352739056918707685326 Data Sheet 1 /docs/en/data-sheet/MMPF0100.pdf 2017-01-24 1346781267650740071933 TSP 5 May 24, 2022 Data Sheet The PF0100 SMARTMOS power management integrated circuit (PMIC) provides a highly programmable/ configurable architecture, with fully integrated power devices and minimal external components. None /docs/en/data-sheet/MMPF0100.pdf English documents 1444679 None 980000996212993340 2023-08-23 N /docs/en/data-sheet/MMPF0100.pdf MMPF0100, 14 Channel Configurable Power Management Integrated Circuit - Data Sheet /docs/en/data-sheet/MMPF0100.pdf documents 980000996212993340 Data Sheet N en None Y pdf 20 N N MMPF0100, 14 Channel Configurable Power Management Integrated Circuit - Data Sheet MMPF0100F0AEP,MMPF0100F0ANES,MMPF0100F0EP,MMPF0100F1AEP,MMPF0100F1EP,MMPF0100F2AEP,MMPF0100F2EP,MMPF0100F3AEP,MMPF0100F3ANES,MMPF0100F4AEP,MMPF0100F4ANES,MMPF0100F6AEP,MMPF0100F6ANES,MMPF0100F9ANES,MMPF0100FAANES,MMPF0100NPAEP,MMPF0100NPANES,MMPF0100NPEP 1.4 MB MMPF0100 N 1346781267650740071933 Errata 1 /docs/en/errata/MMPF0100ER.pdf 2016-10-31 1349718571542735235777 TSP 7 Apr 15, 2014 Errata This errata document applies to the mask 1N47F, 1N18J SMARTMOS<sup>&#174;</sup> devices. None /docs/en/errata/MMPF0100ER.pdf English documents 265186 None 155452329886410597 2022-12-07 N /docs/en/errata/MMPF0100ER.pdf MMPF0100 Errata for Mask 1N47F and 1N18J - Errata /docs/en/errata/MMPF0100ER.pdf documents 155452329886410597 Errata N en None Y pdf 5.0 N N MMPF0100 Errata for Mask 1N47F and 1N18J - Errata 265.2 KB MMPF0100ER N 1349718571542735235777 User Guide 4 /docs/en/user-guide/KTPF0100UG.pdf 2012-11-16 1353105260274715674347 TSP 1 Aug 13, 2015 User Guide User Guide The KITPF0100EPEVBE evaluation board supports the development and testing of the PF0100 PMIC, a member of NXP&#8217;s i.MX6 family of application processors. Y None /docs/en/user-guide/KTPF0100UG.pdf English 3909891 None User Guide 2023-06-19 N /docs/en/user-guide/KTPF0100UG.pdf KTPF0100UG, KITPF0100EPEVBE Evaluation Board - User&#8217;s Guide /docs/en/user-guide/KTPF0100UG.pdf documents 132339537837198660 User Guide N Y en None Y t792 pdf 5.0 N N KTPF0100UG, KITPF0100EPEVBE Evaluation Board - User&#8217;s Guide 3.9 MB KTPF0100UG N 1353105260274715674347 /docs/en/user-guide/KTPF0100SKTUG.pdf 2016-10-31 1370555349638725684574 TSP 2 Jun 4, 2013 User Guide User Guide NXP recommends the KITPFPGMEVME development tool, also known as the PF Programmer, for configuring and programming the PF0100 Power Management Integrated Circuit. This PMIC is designed primarily for use with NXP&#8217;s i.MX6 series of application processors. Y None /docs/en/user-guide/KTPF0100SKTUG.pdf English 1283694 None User Guide 2022-12-07 N /docs/en/user-guide/KTPF0100SKTUG.pdf KITPF0100SKTEVBE Programming Socket - User Guide /docs/en/user-guide/KTPF0100SKTUG.pdf documents 132339537837198660 User Guide N Y en None Y t792 pdf 1.0 N N KITPF0100SKTEVBE Programming Socket - User Guide 1.3 MB KTPF0100SKTUG N 1370555349638725684574 /docs/en/user-guide/KTPFPGHWUG.pdf 2013-12-20 1387571519015716601663 TSP 3 Dec 20, 2013 User Guide User Guide The KITPFPGMEVME development tool, also known as the PF Programmer, is a standalone device designed for configuring and programming the SMARTMOS<sup>&#174;</sup> PF Family of Power Management Integrated Circuit devices. It is designed to control and program PF devices on customer application boards through an 8-pin header interface, as well as the KITPF0100SKTEVBE programming socket device for OTP programming of standalone PF devices. Y None /docs/en/user-guide/KTPFPGHWUG.pdf English 265703 None User Guide 2023-06-19 N /docs/en/user-guide/KTPFPGHWUG.pdf KITPFPGMEVME Rev B Programmer - User Guide /docs/en/user-guide/KTPFPGHWUG.pdf documents 132339537837198660 User Guide N en None N t792 pdf 1.0 N N KITPFPGMEVME Rev B Programmer - User Guide 265.7 KB KTPFPGHWUG N 1387571519015716601663 /docs/en/user-guide/KTPFSWUG4.pdf 2013-12-20 1387571727193716838847 TSP 4 Dec 19, 2013 User Guide User Guide The KITPFGUI 4.0 is a flexible and easy-to-use Graphical User Interface (GUI), created to control and configure the customer evaluation boards and development tools provided by NXP to support the PF series of Power Management Integrated Circuits (PMIC) powered by SMARTMOS<sup>&#174;</sup> technology. Y None /docs/en/user-guide/KTPFSWUG4.pdf English 1655278 None User Guide 2022-12-07 N /docs/en/user-guide/KTPFSWUG4.pdf KITPFGUI 4.0 Graphical User Interface - User Guide /docs/en/user-guide/KTPFSWUG4.pdf documents 132339537837198660 User Guide N en None Y t792 pdf 1.0 N N KITPFGUI 4.0 Graphical User Interface - User Guide 1.7 MB KTPFSWUG4 N 1387571727193716838847 true Y Tools

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