Integrated HCS12 Based Relay Driver Microcontrollers (MCUs) with LIN

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Block Diagram

HCS12 Block Diagram

HCS12 Block Diagram

Features

CPU Core

  • 16-Bit S12 CPU, 64/48/32 kByte Program Flash
  • 4/2/0 kByte Data Flash
  • 6/2/2 kBytes of RAM
  • Background debug (BDM) and debug module (DBG)
  • 16-Bit, 4 Channel - Timer Module (TIM16B4C)
  • Die to Die bus interface for transparent memory mapping

Standard I/O

  • 6 or 10 digital MCU GPIOs shared with SPI
  • 10-Bit, 15 Channel - Analog to Digital Converter (ADC)
  • 8-Bit, 2 Channel - Pulse width modulation module (PWM)

Application Specific Functions

  • On-chip oscillator and two independent watchdogs
  • LIN 2.1 Physical Layer Interface with integrated SCI
  • Six high voltage / Wake-up inputs (L5…0)
  • Three low voltage GPIOs (PB2…0)
  • Low power modes with cyclic sense and forced wake-up
  • Two protected low side outputs to drive inductive loads
  • Two protected high side outputs
  • Hall sensor supply and integrated voltage regulator(s)
  • Reverse battery protected voltage sense module
  • Chip temperature sensor
  • Current sense module with selectable gain

Product Longevity

  • This product is included in the  NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The MM912F634 is included in the 15-year program

Part numbers include: MM912F634DV1AE, MM912F634DV2AE, MM912F634DV2AP, MM912G634DM1AE, MM912G634DV1AE, MM912H634DV1AE.

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Documentation

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Design Files

Hardware

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5 hardware offerings

Software

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3 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

2 engineering services

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