The LPC11Uxx MCU Family is an Arm® Cortex®-M0+ and Cortex-M0 based- low-cost 32-bit MCU family operating at CPU frequencies of up to 50 MHz. The LPC11Uxx MCU family is designed for 8/16-bit microcontroller operations, offering performance, low power, simple instruction set reduce code size compared to existing 8/16-bit architectures.
Equipped with a highly flexible and configurable full-speed USB 2.0 device controller, the LPC11Uxx family brings design flexibility and seamless integration to today’s demanding connectivity solutions. The peripheral complement of the LPC11Uxx family includes up to 256KB of flash memory, up to 32 KB of SRAM, up to two I2C-bus interfaces, up to five USARTs, up to two SSP, PWM/timer subsystem with up to six configurable multi-purpose timers, an Analog to Digital Converter, and up to 80 general purpose I/O pins.
|
|
|
|
|
|
---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
1-5 of 43 documents
Please wait while your secure files are loading.
1-5 of 10 design files
Receive the full breakdown. See the product footprint and more in the eCad file.
Please wait while your secure files are loading.
1-5 of 12 hardware offerings
Additional hardware available. View our featured partner solutions.
1 hardware offering
To find additional partner offerings that support this product, visit our Partner Marketplace.
Quick reference to our software types.
1 software file
Note: For better experience, software downloads are recommended on desktop.
Please wait while your secure files are loading.
1-5 of 6 software offerings
To find additional partner offerings that support this product, visit our Partner Marketplace.
2 engineering services
There are no results for this selection.
To find additional partner offerings that support this product, visit our Partner Marketplace.
4 trainings
To find additional partner offerings that support this product, visit our Partner Marketplace.