Application Note (6)
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UUencoding for UART ISP[AN11229]
Brochure (1)
Data Sheet (1)
Package Information (1)
Supporting Information (1)
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ADC design guidelines[TN00009]
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The NXP® LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB 2.0 On-The-Go (OTG), up to 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit ADC, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3130/3131 have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling.
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Part | CAD Model | SCTimer / PWM | Package Type | Temperature range | Status | Product category |
---|---|---|---|---|---|---|
1 | TFBGA180 | -40 °C to +85 °C | Active | 170-LPC3100/200- |
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Single-chip 16/32-bit microcontrollers; 32/64/128/256/512 kB ISP/IAP flash with 10-bit ADC and DAC
buy optionsLow-cost, low-power Arm926EJ-S™ MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller
buy optionsSingle-chip 16/32-bit microcontrollers; 32/64/128/256/512 kB ISP/IAP flash with 10-bit ADC and DAC
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