Design Files
1 design file
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Models
BSDL for LPC313x and LPC314x pkg TFBGA
The NXP LPC3141 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0 OTG, 192 kB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3141 have multiple power domains and a very flexible Clock
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1 design file
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