Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG, external memory interface

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NXP Semiconductors designed the LPC2470 microcontroller, powered by the Arm7TDMI-S^™ core, to be a highly integrated microcontroller for a wide range of applications that require advanced communications and high quality graphic displays. The LPC2470 microcontroller is flashless. The LPC2470, with real-time debug interfaces that include both JTAG and embedded trace, can execute both 32-bit Arm^® and 16-bit Thumb instructions.

The LPC2470 microcontroller incorporates an LCD controller, a 10/100 Ethernet Media Access Controller (MAC), a USB full-speed device/host/OTG controller with 4 kB of endpoint RAM, four UARTs, two Controller Area Network (CAN) channels, an SPI interface, two Synchronous Serial Ports (SSP), three I²C interfaces, and an I2S interface. Supporting this collection of serial communications interfaces are the following feature components; an on-chip 4 MHz internal oscillator, 98 kB of total RAM consisting of 64 kB of local SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for general purpose DMA, 2 kB of battery powered SRAM, and an External Memory Controller (EMC). These features make this device optimally suited for portable electronics and Point-of-Sale (POS) applications. Complementing the many serial communication controllers, versatile clocking capabilities, and memory features are various 32-bit timers, a 10-bit ADC, 10-bit DAC, two PWM units, and up to 160 fast GPIO lines. The LPC2470 connects 64 of the GPIO pins to the hardware based Vector Interrupt Controller (VIC), allowing the external inputs to generate edge-triggered interrupts. All of these features make the LPC2470 particularly suitable for industrial control and medical systems.

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Data Sheet

Application Notes

Product Details

Block Diagram

Block diagram: LPC2470FBD208, LPC2470FET208

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Features

Arm7TDMI-S^™ processor, running at up to 72 MHz.
98 kB on-chip SRAM includes:
- 64 kB of SRAM on the Arm local bus for high performance CPU access.
- 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
- 16 kB SRAM for general purpose DMA use also accessible by the USB.
- 2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.
LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.
- Dedicated DMA controller.
- Selectable display resolution (up to 1024 × 768 pixels).
- Supports up to 24-bit true-color mode.
Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, and USB DMA with no contention.
EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as single data rate SDRAM.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP, I²S-bus, and Secure Digital/MultiMediaCard (SD/MMC) interface as well as for memory-to-memory transfers.
Serial Interfaces:
- Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB.
- USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and associated DMA controller.
- Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
- CAN controller with two channels.
- SPI controller.
- Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
- Three I²C-bus interfaces (one with open-drain and two with standard port pins).
- I²S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
Other peripherals:
- SD/MMC memory card interface.
- 160 General purpose I/O pins with configurable pull-up/down resistors.
- 10-bit ADC with input multiplexing among 8 pins.
- 10-bit DAC.
- Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
- Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count inputs.
- RTC with separate power domain. Clock source can be the RTC oscillator or the APB clock.
- 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
- WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
Single 3.3 V power supply (3.0 V to 3.6 V).
4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.
Four reduced power modes: idle, sleep, power-down, and deep power-down.
Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0 and port 2 can be used as edge sensitive interrupt sources.
Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, port 0/2 pin interrupt).
Two independent power domains allow fine tuning of power consumption based on needed features.
Each peripheral has its own clock divider for further power saving. These dividers help reduce active power by 20 % to 30 %.
Brownout detect with separate thresholds for interrupt and forced reset.
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 25 MHz.
On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
Boundary scan for simplified board testing.
Versatile pin function selections allow more possibilities for using on-chip peripheral functions.
Standard Arm test/debug interface for compatibility with existing tools.
Emulation trace module supports real-time trace.

Target Applications

Industrial control
Medical systems
Portable electronics
Point-of-Sale (POS) equipment

Part numbers include: LPC2470FBD208.

Buy/Parametrics

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Documentation

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1-5 of 18 documents

^{Data Sheet}
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG, external memory interface

PDFRev 4.2Oct 27, 20202.7 MBLPC2470English
^{Application Note}
Guidelines for full-speed USB on NXP's LPC microcontrollers

PDFRev 1.1Feb 20, 2014151.2 KBAN11392English
^{Application Note}
Using IAP for LPC2000 Arm^® devices

PDFRev 1.0Jul 21, 2013125.9 KBAN10256English
^{Application Note}
LPC24XX external memory bus example

PDFRev 1.1Nov 12, 2012542.0 KBAN10950English
^{Application Note}
UUencoding for UART ISP

PDFRev 1.0Jul 6, 2012142.1 KBAN11229English
^{Application Note}
PCB layout guidelines for NXP^® MCUs in BGA packages

PDFRev 2.0Apr 22, 2011272.0 KBAN10778English
^{Application Note}
Migrating to the LPC1700 series

PDFRev 1.0Oct 6, 2009615.0 KBAN10878English
^{Application Note}
NicheLite for LPC implementation notes

PDFRev 1.0Jul 16, 2009190.0 KBAN10775English
^{Application Note}
Using the LPC24xx EMC peripheral to drive SDRAM

PDFRev 1.0Dec 1, 2008197.0 KBAN10771English
^{Application Note}
Interfacing 4-wire and 5-wire resistive touchscreens to the LPC247x

PDFRev 1.0Nov 17, 2008139.0 KBAN10675English
^{User Guide}
LPC24XX User manual

PDFRev 1.0Aug 26, 20094.8 MBUM10237English
^Brochure
Create smarter, more efficient white goods; An industry-leading portfolio of cost-effective, power-saving solutions for major home appliances

PDFRev 1.0Apr 8, 20181.1 MB75016543English
^Brochure
Arm^®7 MCU with Ethernet, USB OTG, CAN, and optional LCD controller; 72-MHz, 32-bit microcontroller with Arm7TDMI-S™ core LPC24xx

PDFRev 1.0Aug 31, 2008123.0 KB75016574English
^Brochure
Arm^®7 MCU with Ethernet, USB OTG, CAN, and optional LCD controller

PDFRev 1.0Aug 31, 2008202.9 KB75015914English
^Errata
Errata sheet LPC2470/78

PDFRev 8.1Jul 23, 2012135.0 KBES_LPC2470_78English
^{Package Information}
plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm

PDFRev 1.0Feb 8, 2016884.0 KBSOT459-1English
^{Supporting Information}
ADC design guidelines

PDFRev 1.0May 9, 2014148.8 KBTN00009English
^{Supporting Information}
PWM dual edge driver for 3-phase motor control using LPC23xx, LPC24xx

ZIPRev 1.0Jun 22, 200752.0 KBTN0700XEnglish

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Design Resources

Design Files

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2 design files

Receive the full breakdown. See the product footprint and more in the eCad file.

^Models
IBIS models for LPC2470 pkg LQFP-208 and TFBGA-20

ZIPRev 1Jun 13, 2017 16:19:00725.2 KBIBIS_LPC2470_-_LQFP-208_TFBGA-208
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^{Symbols and Footprints}
LPC2xxx ORCAD symbols

ZIPRev 0Jun 3, 2016 00:00:0013.1 KBLPC2000-ORCAD-SYM
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Software

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3 software files

^{Configuration Tools}
RAppID Initialization for Power Architecture

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^{Code Snippets}
Sample Code Bundle for LPC23xx/LPC24xx Peripherals using Keil's μVision

ZIPRev 1Jul 29, 2016 00:00:00914.7 KBLPC23XX-24XX-SAMP-SW
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^{Code Snippets}
Sample Code Bundle for LPC23XX and LPC24XX Peripheral Using KEIL'S ΜVISION

ZIPRev 1Jun 14, 2017 17:34:00747.6 KBSC_LPC23XX_-_LPC24XX_KEIL-ΜVISION
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Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG, external memory interface

Product Details

Block Diagram

Block diagram: LPC2470FBD208, LPC2470FET208

Features

Target Applications

Buy/Parametrics

Documentation

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Design Resources

Design Files

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IBIS models for LPC2470 pkg LQFP-208 and TFBGA-20

LPC2xxx ORCAD symbols

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Software

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Sample Code Bundle for LPC23xx/LPC24xx Peripherals using Keil's μVision

Sample Code Bundle for LPC23XX and LPC24XX Peripheral Using KEIL'S ΜVISION

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