The UDA1352TS is a single-chip IEC 60958 audio decoder with an integrated stereo DAC employing bitstream conversion techniques.
A lock indication signal is available on pin LOCK, indicating that the IEC 60958 decoder is locked. A separate pin PCMDET is available to indicate whether or not the PCM data is applied to the input.
By default, the DAC output is muted when the decoder is out-of-lock. However, this setting can be overruled in the L3-bus or I²C-bus mode.
The UDA1352TS has IEC 60958 input to the DAC only and is in SSOP28 package.
Besides the UDA1352TS, the UDA1352HL is also available. The UDA1352HL is the full featured version in LQFP48 package.
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Part | CAD Model | Package Type | Status | Product description | Input formats | Output formats | Control Interface | T[min] - [max] | Resolution [max] | Sampling rate [min] - [max] | Power dissipation [Typ] | DAC SNo [Typ] (dB) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
SSOP28 | No Longer Manufactured | Stereo 48 kHz SPDIF audio DAC | SPDIF (IEC 60958) | Analog | I2C, L3, Static | -40 - +85 | 24 | 28 - 55 | 38 | 100 |
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