PCF8574/74A | NXP Semiconductors

Remote 8-Bit I/O Expander for I²C‑Bus with Interrupt

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Block Diagram

PCF8574-PCF8574A Block Diagram

PCF8574-PCF8574A Block Diagram

Features

System Features

  • I²C-bus to parallel port expander
  • 100 kHz I²C-bus interface (Standard-mode I²C-bus)
  • Operating supply voltage 2.5 V to 6 V with non-overvoltage tolerant I/O held to VDD with 100 μA current source
  • 8-bit remote I/O pins that default to inputs at power-up
  • Latched outputs directly drive LEDs
  • Total package sink capability of 80 mA
  • Active LOW open-drain interrupt output
  • Eight programmable target addresses using three address pins
  • Low standby current (2.5 μA typical)
  • -40 °C to +85 °C operation
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
  • Packages offered: DIP16, SO16, SSOP20

Buy/Parametrics

4 results

Include 0 NRND

Order

CAD Model

No of bits

VDD [min]

VDD [max]

No of supplies

Standby current [typ] (µA)

Max Sink Current per bit (mA)

Max Sink Current, per package (mA)

Source Current per bit (mA)

Interrupt output pin

Output mode

Internal pull-up resistor per bit (kOhm)

I2C-bus (kHz)

Footprint body and leads

Package Type

Operating Temperature (°C)

No of Addresses

8

2.5

6.0

1

2.5

25

80

0.1

Y

Quasi

Int I source

100

111.83

SO16

-40~85

8

8

2.5

6.0

1

2.5

25

80

0.1

Y

Quasi

Int I source

100

43.56

SSOP20

-40~85

8

8

2.5

6.0

1

2.5

25

80

0.1

Y

Quasi

Int I source

100

111.83

SO16

-40~85

8

8

2.5

6.0

1

2.5

25

80

0.1

Y

Quasi

Int I source

100

43.56

SSOP20

-40~85

8

Documentation

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Application Note (7)
Brochure (3)
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Design Files

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2 design files

Engineering Services

1 engineering service

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