Low-Power Smart Card Interface

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Product Details

Block Diagram

TDA8034T/AT: Block diagram

TDA8034T/AT: Block diagram

Features

  • Integrated circuit smart card interface in an SO16 package
  • 5 V or 3 V smart card supply
  • One protected half-duplex bidirectional buffered I/O line (C7)
  • VCC regulation:
    • 5 V ± 5 % or 3 V ± 5 % using two low ESR multilayer ceramic capacitors: one of 220 nF and one of 470 nF
    • current spikes of 40 nA/s (VCC = 5 V and 3 V) or 15 nA/s (VCC =1.8 V) up to 20 MHz, with controlled rise and fall times and filtered overload detection of approximately 120 mA
  • Thermal and short-circuit protection for all card contacts
  • Automatic activation and deactivation sequences triggered by a short-circuit, card take-off, overheating, falling VDD, VDD(INTF) or VDDP
  • Enhanced card-side ElectroStatic Discharge (ESD) protection of > 6 kV
  • External clock input up to 26 MHz connected to pin XTAL1
  • Card clock generation up to 20 MHz using pin CLKDIV1 with synchronous frequency changes of:
    • 1/2 fxtal or 1/4 fxtal on TDA8034T
    • fxtal or 1/2 fxtal on TDA8034AT
  • Non-inverted control of pin RST using pin RSTIN
  • Compatible with ISO 7816, NDS and EMV 4.2 payment systems
  • Supply supervisor for killing spikes during power on and off:
    • using a fixed threshold
    • using an external resistor bridge with threshold adjustment
  • Built-in debouncing on card presence contacts (typically 4.5 ms)
  • Multiplexed status signal using pin OFFN

Target Applications

  • Pay TV
  • Electronic payment
  • Identification
  • Bank card readers

Documentation

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Design Files

Engineering Services

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Training

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