Dual Universal Asynchronous Receiver/Transmitter (DUART) | NXP Semiconductors

Dual Universal Asynchronous Receiver/Transmitter (DUART)

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Product Details

Features

Key Features

  • Member of IMPACT family: 3.3 V to 5.0 V, -40 °C to +85 °C and 80xx or 68 K bus interface (I/M modes) for all devices
  • Bit-by-bit real time transmission error check for high data integrity systems
  • Dual full-duplex independent asynchronous receiver/transmitters
  • 256 character FIFOs for each receiver and transmitter
  • Powers up to 9600 baud, 1 stop bit, no parity, 1 stop bit, interrupt disabled, all I/O set to input
  • Pin programming to 68 K or 80xxx bus interface
  • 16-bit programmable counter/timer
  • Parity, framing and overrun error detection
  • Line break detection and generation; false start bit detection
  • Multi-function 8-bit I/O input port per channel loosely assigned to each channel
  • Can serve as clock or control inputs
  • Change of state detection on eight inputs
  • Inputs have typically >100 M Ω pull-up resistors
  • Modem and DMA interface
  • Maximum data transfer rates: 1x - 3 Mb/s, 16x - 2 Mb/s
  • Automatic wake-up mode for multi-drop applications
  • Start-end break interrupt/status
  • Detects break which originates in the middle of a character
  • On-chip crystal oscillator
  • Power down mode at less than 10 ua
  • Receiver time-out mode
  • Single +3.3 V or +5 V power supply

Three Character Recognition System per Channel

  • General purpose character recognition
  • Xon/Xoff character recognition
  • Address recognition Wake up (multi-drop or '9 bit') mode
  • System provides 4 levels of automation on a recognition event

Programmable Data Format

  • 5 to 8 data bits plus parity and 9 bit mode
  • Odd, even, no parity or force parity
  • 9/16,1, 1.5 or 2 stop bits

Programmable Baud Rate for Each Receiver and Transmitter

  • 27 fixed rates: 50 to 2.0 Meg baud (includes MIDI® rate)
  • Other baud rates via external clocks and C/T
  • Programmable user-defined rates derived from a programmable counter/timer
  • External 1x or 16x clock

Programmable Channel Mode

  • Normal (full-duplex)
  • Automatic echo
  • Local loop back
  • Remote loop back
  • Multi-drop mode (also called 'wake-up' or '9-bit')

Versatile Arbitrating Interrupt System

  • Interrupt system totally supports 'single query' polling
  • Output port can be configured to provide a total of up to six separate interrupt type outputs that may be wire-ORed (switched to open drain)
  • Each FIFO can be independently programmed for any of 256 interrupt levels
  • Watch dog timer for each receiver

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Application Note (7)
Brochure (2)
Data Sheet (1)
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