Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
Wafer and Die Form Factor of PCF8583
The PCF8564A is a CMOS real-time clock and calendar optimized for low power consumption. A programmable clock output, interrupt output and voltage low detector are also provided. All addresses and data are transferred serially via a two-line bidirectional I²C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte.
Product Details
Features
- Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal
- Wide clock operating voltage: 1.0 V to 5.5 V
- Low back-up current typical 250 nA at 3.0 V and 25 ℃
- 400 kHz two-wire I²C interface (1.8 V to 5.5 V)
- Low-voltage detector
- Alarm and timer functions
- Two integrated oscillator capacitors
- Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and 1 Hz)
- Internal Power-On Reset (POR)
- I²C target address: read A3h, write A2h
Buy/Parametrics
|
|
|
|
|
|
|
|---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Documentation
Quick reference to our documentation types.
1-5 of 7 documents
-
Data Sheet
Real time clock and calendar
-
Application Note
ESD and EMC sensitivity of IC
-
Application Note
Handling bare die
-
Application Note
AN10652
-
User Guide
I2C-bus specification and user manual
Design Resources
Engineering Services
To get further assistance directly from NXP, please see our Engineering Services.
3 engineering services
-
Independent Design House (IDH)
Hardware Design Services
-
Independent Design House (IDH)
NFC hardware design review and consulting
-
Independent Design House (IDH)
Embedded Software Design
To find additional partner offerings that support this product, visit our Partner Marketplace.