Remote 8-Bit I/O Expander for Fm+ I²C-Bus with Interrupt and Reset | NXP Semiconductors

Remote 8-Bit I/O Expander for Fm+ I²C-Bus with Interrupt and Reset

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Block Diagram

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PCA9672

PCA9672 BLOCK DIAGRAM

PCA9672BS, PCA9672D, PCA9672PW

Features

Key Features

  • I²C-bus to parallel port expander
  • 1 MHz I²C‑bus interface (Fast-mode Plus I²C-bus)
  • Operating supply voltage 2.3 V to 5.5 V with 5.5 V tolerant I/Os held to VDD with 100 μA current source
  • 8-bit remote I/O pins that default to inputs at power-up
  • Latched outputs with 25 mA sink capability directly drive LEDs
  • Total package sink capability of 200 mA
  • Active LOW reset input
  • Active LOW open-drain interrupt output
  • Sixteen programmable target addresses using two address pins
  • Readable device ID (manufacturer, device type, and revision)
  • -40 °C to +85 °C operation
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22‑C101
  • Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
  • Packages offered: SO16, TSSOP16, HVQFN16

Buy/Parametrics

1 result

Include 2 NRND

CAD Model

No of bits

VDD [min]

VDD [max]

Over volt tolerant

No of supplies

Standby current [typ] (µA)

Max Sink Current per bit (mA)

Max Sink Current, per package (mA)

Source Current per bit (mA)

Interrupt output pin

Reset input pin

Output mode

Internal pull-up resistor per bit (kOhm)

I2C-bus (kHz)

Footprint body and leads

Package Type

Operating Temperature (°C)

No of Addresses

8

2.3

5.5

Y

1

2.5

25

200

0.1

Y

Y

Quasi

Int I source

1000

9.61

HVQFN16

-40~85

16

Documentation

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1-10 of 12 documents

Compact List

Application Note (2)
Brochure (1)
Data Sheet (1)
Package Information (3)
Packing Information (3)
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Design Files

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3 design files

Hardware

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2 hardware offerings

Engineering Services

1 engineering service

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