PTN3460/PTN3460I - Commercial and Industrial e(DP) to LVDS bridge IC | NXP Semiconductors

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PTN3460/PTN3460I - Commercial and Industrial E(DP) to LVDS Bridge IC

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PTN3460 is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion and transmits processed stream in LVDS format.

PTN3460 has two high-speed ports: Receive port facing DP Source (for example, CPU/GPU/chip set), Transmit port facing the LVDS receiver (for example, LVDS display panel controller). The PTN3460 can receive DP stream at link rate 1.62 Gbit/s or 2.7 Gbit/s and it can support 1-lane or 2-lane DP operation. It interacts with DP source via DP Auxiliary (AUX) channel transactions for DP link training and setup.

It supports single bus or dual bus LVDS signaling with color depths of 18 bits per pixel or 24 bits per pixel and pixel clock frequency up to 112 MHz. The LVDS data packing can be done either in VESA or JEIDA format. Also, the DP AUX interface transports I²C-over-AUX commands and support EDID-DDC communication with LVDS panel. To support panels without EDID ROM, the PTN3460 can emulate EDID ROM behavior avoiding specific changes in system video BIOS.

PTN3460 provides high flexibility to optimally fit under different platform environments. It supports three configuration options: multi-level configuration pins, DP AUX interface, and I²C-bus interface.

PTN3460 can be powered by either 3.3 V supply only or dual supplies (3.3 V / 1.8 V) and is available in the HVQFN56 7 mm x 7 mm package with 0.4 mm pitch.

Product Details

Features

Device

  • Embedded microcontroller and on-chip Non-Volatile Memory (NVM) allow for flexibility in firmware updates
  • LVDS panel power-up (/down) sequencing control
  • Firmware controlled panel power-up (/down) sequence timing parameters
  • No external timing reference needed
  • EDID ROM emulation to support panels with no EDID ROM. Emulation ON/OFF is set via configuration pin CFG4
    • Supports EDID structure v1.3
    • On-chip EDID emulation up to seven different EDID data structures
    • eDP complying PWM signal generation or PWM signal pass through from eDP source

DisplayPort Receiver

  • Compliant to DP v1.2a and v1.1a
  • Compliant to eDP v1.2 and v1.1
  • Supports Main Link operation with one or two lanes (select through configuration pin CFG3)
  • Supports Main Link rate: Reduced Bit Rate (1.62 Gbit/s) and High Bit Rate (2.7 Gbit/s)
  • Supports 1 Mbit/s AUX channel
    • Supports Native AUX and I²C-over-AUX transactions
  • Supports down spreading to minimize EMI
  • Integrated 50 Ω termination resistors provide impedance matching on both Main Link lanes and AUX channel
  • High performance Auto Receive Equalization enabling optimal channel compensation, device placement flexibility and power saving at CPU/GPU
  • Supports eDP authentication options: Alternate Scrambler Seed Reset (ASSR) and Alternate Framing
  • Supports Full Link training
  • Supports DisplayPort symbol error rate measurements
  • Supports PCB routing flexibility by programming for:
    • AUX P/N swapping
    • DP Main Link P/N swapping

LVDS Transmitter

  • Compatible with ANSI/TIA/EIA-644-A-2001 standard
  • Supports RGB data packing as per JEIDA and VESA data formats
  • Supports pixel clock frequency from 6 MHz to 112 MHz
  • Supports single LVDS bus operation up to 112 mega pixels per second
  • Supports dual LVDS bus operation up to 224 mega pixels per second
  • Supports color depth options: 18 bpp, 24 bpp
  • Programmable center spreading of pixel clock frequency to minimize EMI
  • Supports 1920 x 1200 at 60 Hz resolution in dual LVDS bus mode
  • Programmable LVDS signal swing to pre-compensate for channel attenuation or allow for power saving
  • Supports PCB routing flexibility by programming for:
    • LVDS bus swapping
    • Channel swapping
    • Differential signal pair swapping
  • Supports Data Enable polarity programming
  • DDC control for EDID ROM access; I²C-bus interface up to 400 kbit/s

Control and System

  • Device programmability
    • Multi-level configuration pins enabling wider choice
    • I²C-bus target interface supporting Standard-mode (100 kbit/s) and Fast-mode (400 kbit/s)
  • Power management
    • Low-power state: DP AUX command-based Low-power mode (SET POWER)
    • Deep power-saving state via a dedicated pin

General

  • Power supply: with on-chip regulator
    • 3.3 V ± 10 % (integrated regulator switched on)
    • 3.3 V ± 10 %, 1.8 V ± 5 % (integrated regulator switched off)
  • ESD: 8 kV HBM, 1 kV CDM
  • Operating temperature range: -40°C to +85°C
  • HVQFN56 package 7 mm x 7 mm, 0.4 mm pitch; exposed center pad for thermal relief and electrical ground

PTN3460I Additional Features

  • Configurable CFG3 for to DP one or two lanes selection
  • Configurable CFG4 for EDID ROM emulation ON/OFF selection
  • Industrial temperature range -40°C to 85°C.

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PTN3460BS
Data Sheet

Active

1K @ US$1.77

HVQFN56

56

Display Port

LVDS

PTN3460IBS
Data Sheet

Active

1K @ US$2.48

HVQFN56

56

Display Port

LVDS

N true 0 PSPPTN3460en 7 Application Note Application Note t789 1 Data Sheet Data Sheet t520 2 Package Information Package Information t790 1 Packing Information Packing Information t935 2 User Guide User Guide t792 1 en_US en_US en Data Sheet Data Sheet 2 1 2.1 English 1442062819181726223461 PSP 1.1 MB None None documents None 1442062819181726223461 /docs/en/data-sheet/PTN3460I.pdf 1108170 /docs/en/data-sheet/PTN3460I.pdf PTN3460I documents N N 2016-08-16 eDP to LVDS bridge for industrial and embedded applications /docs/en/data-sheet/PTN3460I.pdf /docs/en/data-sheet/PTN3460I.pdf Data Sheet N 980000996212993340 2023-10-17 pdf N en Aug 16, 2016 980000996212993340 Data Sheet Y N eDP to LVDS bridge for industrial and embedded applications 2 4.0 English 1442057166069715899856 PSP 422.1 KB None None documents None 1442057166069715899856 /docs/en/data-sheet/PTN3460.pdf 422070 /docs/en/data-sheet/PTN3460.pdf PTN3460 documents N 2014-03-12 eDP to LVDS bridge IC /docs/en/data-sheet/PTN3460.pdf /docs/en/data-sheet/PTN3460.pdf Data Sheet N 980000996212993340 2022-12-07 pdf en Mar 12, 2014 980000996212993340 Data Sheet N eDP to LVDS bridge IC Application Note Application Note 1 3 1.0 English 1442086928246699928283 PSP 443.8 KB None None documents None 1442086928246699928283 /docs/en/application-note/AN11489.pdf 443802 /docs/en/application-note/AN11489.pdf AN11489 documents N N 2014-12-19 PTN3460 power-up reset requirement /docs/en/application-note/AN11489.pdf /docs/en/application-note/AN11489.pdf Application Note N 645036621402383989 2023-10-17 pdf N en Dec 19, 2014 645036621402383989 Application Note Y N PTN3460 power-up reset requirement User Guide User Guide 1 4 1.1 English 1442126041828701748250 PSP 532.7 KB None None documents None 1442126041828701748250 /docs/en/user-guide/UM10492.pdf 532659 /docs/en/user-guide/UM10492.pdf UM10492 documents N N 2015-03-17 PTN3460 eDP to LVDS bridge IC application board /docs/en/user-guide/UM10492.pdf /docs/en/user-guide/UM10492.pdf User Guide N 132339537837198660 2023-10-17 pdf N en Mar 17, 2015 132339537837198660 User Guide Y N PTN3460 eDP to LVDS bridge IC application board Package Information Package Information 1 5 1.1 English 1455078855907709803502 PSP 301.7 KB None None documents None 1455078855907709803502 /docs/en/package-information/SOT949-2.pdf 301712 /docs/en/package-information/SOT949-2.pdf SOT949-2 documents N N 2016-06-10 plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 7 x 7 x 0.85 mm /docs/en/package-information/SOT949-2.pdf /docs/en/package-information/SOT949-2.pdf Package Information N 302435339416912908 2023-10-17 pdf N en Jun 10, 2016 302435339416912908 Package Information Y N plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 7 x 7 x 0.85 mm Packing Information Packing Information 2 6 2.0 English 1442131688395728118126 PSP 233.0 KB None None documents None 1442131688395728118126 /docs/en/packing/SOT949-2_528.pdf 233013 /docs/en/packing/SOT949-2_528.pdf SOT949-2_528 documents N N 2014-08-06 HVQFN56; Reel dry pack, SMD, 13" Q2/T3 turn product orientation Orderable part number ending, 528 or MP Ordering code (12NC) ending 528 /docs/en/packing/SOT949-2_528.pdf /docs/en/packing/SOT949-2_528.pdf Packing Information N 145666923842250347 2023-10-17 pdf N en Aug 6, 2014 145666923842250347 Packing Information Y N HVQFN56; Reel dry pack, SMD, 13" Q2/T3 turn product orientation Orderable part number ending, 528 or MP Ordering code (12NC) ending 528 7 2.0 English 1442131691376725921593 PSP 232.8 KB None None documents None 1442131691376725921593 /docs/en/packing/SOT949-2_518.pdf 232803 /docs/en/packing/SOT949-2_518.pdf SOT949-2_518 documents N N 2014-08-06 HVQFN56; Reel dry pack, SMD, 13" Q1/T1 standard orientation Orderable part number ending ,518 or Y Ordering code (12NC) ending 518 /docs/en/packing/SOT949-2_518.pdf /docs/en/packing/SOT949-2_518.pdf Packing Information N 145666923842250347 2023-10-17 pdf N en Aug 6, 2014 145666923842250347 Packing Information Y N HVQFN56; Reel dry pack, SMD, 13" Q1/T1 standard orientation Orderable part number ending ,518 or Y Ordering code (12NC) ending 518 false 0 PTN3460 downloads en true 1 Y PSP Application Note 1 /docs/en/application-note/AN11489.pdf 2014-12-19 1442086928246699928283 PSP 3 Dec 19, 2014 Application Note None /docs/en/application-note/AN11489.pdf English documents 443802 None 645036621402383989 2023-10-17 N /docs/en/application-note/AN11489.pdf PTN3460 power-up reset requirement /docs/en/application-note/AN11489.pdf documents 645036621402383989 Application Note N en None Y pdf 1.0 N N PTN3460 power-up reset requirement 443.8 KB AN11489 N 1442086928246699928283 Data Sheet 2 /docs/en/data-sheet/PTN3460I.pdf 2016-08-16 1442062819181726223461 PSP 1 Aug 16, 2016 Data Sheet None /docs/en/data-sheet/PTN3460I.pdf English documents 1108170 None 980000996212993340 2023-10-17 N /docs/en/data-sheet/PTN3460I.pdf eDP to LVDS bridge for industrial and embedded applications /docs/en/data-sheet/PTN3460I.pdf documents 980000996212993340 Data Sheet N en None Y pdf 2.1 N N eDP to LVDS bridge for industrial and embedded applications 1.1 MB PTN3460I N 1442062819181726223461 /docs/en/data-sheet/PTN3460.pdf 2014-03-12 1442057166069715899856 PSP 2 Mar 12, 2014 Data Sheet None /docs/en/data-sheet/PTN3460.pdf English documents 422070 None 980000996212993340 2022-12-07 /docs/en/data-sheet/PTN3460.pdf eDP to LVDS bridge IC /docs/en/data-sheet/PTN3460.pdf documents 980000996212993340 Data Sheet N en None pdf 4.0 N eDP to LVDS bridge IC 422.1 KB PTN3460 N 1442057166069715899856 Package Information 1 /docs/en/package-information/SOT949-2.pdf 2016-06-10 1455078855907709803502 PSP 5 Jun 10, 2016 Package Information None /docs/en/package-information/SOT949-2.pdf English documents 301712 None 302435339416912908 2023-10-17 N /docs/en/package-information/SOT949-2.pdf plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 7 x 7 x 0.85 mm /docs/en/package-information/SOT949-2.pdf documents 302435339416912908 Package Information N en None Y pdf 1.1 N N plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 7 x 7 x 0.85 mm 301.7 KB SOT949-2 N 1455078855907709803502 Packing Information 2 /docs/en/packing/SOT949-2_528.pdf 2014-08-06 1442131688395728118126 PSP 6 Aug 6, 2014 Packing Information None /docs/en/packing/SOT949-2_528.pdf English documents 233013 None 145666923842250347 2023-10-17 N /docs/en/packing/SOT949-2_528.pdf HVQFN56; Reel dry pack, SMD, 13" Q2/T3 turn product orientation Orderable part number ending, 528 or MP Ordering code (12NC) ending 528 /docs/en/packing/SOT949-2_528.pdf documents 145666923842250347 Packing Information N en None Y pdf 2.0 N N HVQFN56; Reel dry pack, SMD, 13" Q2/T3 turn product orientation Orderable part number ending, 528 or MP Ordering code (12NC) ending 528 233.0 KB SOT949-2_528 N 1442131688395728118126 /docs/en/packing/SOT949-2_518.pdf 2014-08-06 1442131691376725921593 PSP 7 Aug 6, 2014 Packing Information None /docs/en/packing/SOT949-2_518.pdf English documents 232803 None 145666923842250347 2023-10-17 N /docs/en/packing/SOT949-2_518.pdf HVQFN56; Reel dry pack, SMD, 13" Q1/T1 standard orientation Orderable part number ending ,518 or Y Ordering code (12NC) ending 518 /docs/en/packing/SOT949-2_518.pdf documents 145666923842250347 Packing Information N en None Y pdf 2.0 N N HVQFN56; Reel dry pack, SMD, 13" Q1/T1 standard orientation Orderable part number ending ,518 or Y Ordering code (12NC) ending 518 232.8 KB SOT949-2_518 N 1442131691376725921593 User Guide 1 /docs/en/user-guide/UM10492.pdf 2015-03-17 1442126041828701748250 PSP 4 Mar 17, 2015 User Guide None /docs/en/user-guide/UM10492.pdf English documents 532659 None 132339537837198660 2023-10-17 N /docs/en/user-guide/UM10492.pdf PTN3460 eDP to LVDS bridge IC application board /docs/en/user-guide/UM10492.pdf documents 132339537837198660 User Guide N en None Y pdf 1.1 N N PTN3460 eDP to LVDS bridge IC application board 532.7 KB UM10492 N 1442126041828701748250 true Y Products

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