Design Files
2 design files
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Models
GLT2012 IBIS model
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Symbols and Footprints
GTL2012DP-TSSOP8-CAD Symbol and PCB Footprint – BXL File
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The GTL2012 is a 2-bit translating transceiver designed for 3.3 V system interface with a GTL-/GTL/GTL+ bus.
The direction pin (DIR) allows the part to function as either a GTL-to-LVTTL sampling receiver or as an LVTTL-to-GTL interface.
The GTL2012 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS inputs.
1 result
Include 0 NRND
Part | Order | CAD Model | Status | Signal Application | Type VLT | Number of bits | VCC(A) (Min - Max) | VCC(B) (Min-Max) | Supply Current (Typ) (μA) | Supply Current (Max) (μA) | Input Type (TTL, CMOS, Schmitt Trigger) | Output Type (Open Drain, 3-State, Push-Pull, Pass-gate) | Package Type | Package Dimensions (LxWxZ (mm)) | Ambient Operating Temperature (Min to Max) (℃) | AEC-Q100 compliant | Budgetary Price excluding tax |
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Active | GTL bus | LVTTL to GTL w/ Direction Pin | 2 | 0 to 3.6 | 0 to 5.5 | 4000 | 10000 | LVTTL | GTL (Open-drain) | TSSOP8 | 3 x 3 x 1.1 | -40 to 85 | N | 1K @ US$0.42 |
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