Design Files
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Models
GLT2007 IBIS model
The GTL2007 is a customized translator between dual Xeon processors, Platform Health Management, South Bridge and Power Supply LVTTL and GTL signals.
The GTL2007 is derived from the GTL2006 with an enable function added that disables the error output to the monitoring agent for platforms that monitor the individual error conditions from each processor. This enable function can be used so that false error conditions are not passed to the monitoring agent when the system is unexpectedly powered down. This unexpected power-down could be from a power supply overload, a CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good signal or the individual enables to the VRD power good for each processor.
Typically Xeon processors specify a VTT of 1.1 V to 1.2 V, as well as a nominal Vref of 0.73 V to 0.76 V. To allow for future voltage level changes that may extend Vref to 0.63 of VTT(minimum of 0.693 V with VTT of 1.1 V) the GTL2007 allows a minimum Vref of 0.66 V. Characterization results show that there is little DC or AC performance variation between these Vref levels.
Part numbers include: GTL2007PW.
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