8-bit USB Cost-Effective JM MCUs

8-bit USB Cost-Effective JM MCUs | NXP Semiconductors

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The S08JM family extends NXP’s entry-level USB portfolio. Featuring on-chip USB 2.0 full-speed device support, it provides a fast, economical and easy way to standardize serial communications in industrial and consumer applications. All MCUs in the S08JM family use the enhanced S08 core. Additionally, NXP® provides two complimentary USB software stacks to help designers simplify applications with USB functionality: USB-LITE Stack by CMX and the USB-MINI Stack by NXP.

Data Sheet

Reference Manual

Product Details

Block Diagram

Freescale S08JM Microcontroller Block Diagram

Get diagram PDF

Features

8-bit HCS08 Central Processing Unit (CPU)

Up to 24 MHz internal bus (48 MHz HCS08 core) frequency offering 2.7 to 5.5V across temperature range of -40°C to +85°C
Support for up to 32 peripheral interrupt/reset sources

On-Chip Memory

Up to 60K flash read/program/erase over full operating voltage and temperature
Up to 4K RAM
256 Byte USB RAM

Power-Saving Modes

Wait plus two stop modes
Multi-purpose clock generator (MCG)

Peripherals

USB Device Module
Analog comparators (ACMP)—Analog comparator with option to compare to internal reference
Analog to digital converter (ADC)—12-channel, 12-bit resolution
Two serial communications interface (SCI) modules offering asynchronous communications
I²C with up to 100 kbps maximum bus loading
- multi-controller operation
- programmable target address
- interrupt driven byte-by-byte data transfer
- supports broadcast mode and 10-bit addressing
SPI—Two serial peripheral interfaces with full-duplex or single-wire bidirectional
- double-buffered transmit and receive
- leader or follower mode;
- MSB-first or LSB-first shifting
Timer pulse width modulation (TPM)—Up to eight channels

Input/Output

Up to eight keyboard interrupt (KBI) pins with selectable polarity
51 general-purpose input/outputs (GPIO) and one input-only and one output-only pin

System Protection

Watchdog computer operating properly (COP) reset
- option to run from dedicated 1 kHz internal clock source or bus clock
Low-voltage detection with reset or interrupt
- selectable trip points
Illegal op code detection with reset
Flash block protection

Hardware Development Support

Single-wire background debug interface
Breakpoint capability
On-chip in-circuit emulator (ICE) debug module

Part Show description	Status	Package Type	Package Termination Count	Flash (kB)	RAM (kB)	Core Type	Operating Frequency [Max] (MHz)	Bus Frequency (typ) (MHz)	I²C	SPI	Supply Voltage [min] (V)	Supply Voltage [max] (V)	GPIO	Ambient Operating Temperature (Min to Max) (℃)	SCI
MC9S08JM32CGT Data Sheet	Active	HVQFN48	48	32	2	S08	24	24	1	2	2.7	5.5	37	-40 to 85	2
MC9S08JM32CLD Data Sheet	Active	LQFP44	44	32	2	S08	24	24	1	2	2.7	5.5	33	-40 to 85	2
MC9S08JM32CLH Data Sheet	Active	LQFP64	64	32	2	S08	24	24	1	2	2.7	5.5	51	-40 to 85	2
MC9S08JM32CQH Data Sheet	Active	QFP64	64	32	2	S08	24	24	1	2	2.7	5.5	51	-40 to 85	2
MC9S08JM60CGT Data Sheet	Active	HVQFN48	48	60	4	S08	24	24	1	2	2.7	5.5	37	-40 to 85	2
MC9S08JM60CLD Data Sheet	Active	LQFP44	44	60	4	S08	24	24	1	2	2.7	5.5	33	-40 to 85	2
MC9S08JM60CLH Data Sheet	Active	LQFP64	64	60	4	S08	24	24	1	2	2.7	5.5	51	-40 to 85	2
MC9S08JM60CQH Data Sheet	Active	QFP64	64	60	4	S08	24	24	1	2	2.7	5.5	51	-40 to 85	2