S12ZVC Mixed-Signal MCUs|MagniV

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The S12ZVC platform, part of the S12 MagniV^® mixed-signal MCU family, offers a low-cost, highly integrated solution that enables the design of smallest possible automotive CAN-termination nodes, while the family concept gives you scalability for platform design.

The S12ZVC integrates a sophisticated S12Z core together with a 12 V to 5 V voltage regulator and a CAN physical layer for automotive and industrial applications such as sensors, actuators switch panels or other user interfaces.

For additional information and sample availability, contact your local NXP^® Sales Office.

Reference Manual

Application Notes

Product Details

Block Diagram

S12 MagniV Mixed-Signal MCU for CAN Applications Block Diagram

Get diagram PDF

Features

General

Enhanced S12Z core at 32 MHz bus speed
Up to 192 KB Flash (with ECC)
2 KB EEPROM (with ECC)
Up to 12 KB RAM (with ECC)
Vreg for 3.5 to 20-volt operating range, scalable in supply for on- and off-chip systems
CAN physical layer

High-resolution mixed signal

12-bit resolution ADC
16ns resolution PWM and Timer

SafeAssure Program

Safe Assure^® (Functional Safety)

When it comes to functional safety, NXP stands for quality and reliability. Our SafeAssure program simplifies system-level safety requirements in accordance with ISO 26262.

S12ZVC Family Members

Feature	S12ZVCA				S12ZVCA				S12ZVC				S12ZVC
Package	64-pin LQFP-EP				48-pin LQFP				64-pin LQFP-EP				48-pin LQFP
Flash memory (ECC) (KByte)	192	128	96	64	192	128	96	64	192	128	96	64	192	128	96	64
EEPROM (ECC) (KByte) (4-byte erasable)	2	2	2	1	2	2	2	1	2	2	2	1	2	2	2	1
RAM (ECC) (KByte)	12	8	8	4	12	8	8	4	12	8	8	4	12	8	8	4
High Speed CAN Physical Layer	1				1				1				1
High Voltage Inputs	2				2				2				2
Vreg for CAN PHY with ext. ballast (BCTLC)	yes				yes				yes				yes
VDDX/VSSX pins	2/2				2/2				2/2				2/2
msCAN	1				1				1				1
SCI/SPI/IIC	2/2/1				2/1/1				2/2/1				2/1/1
SENT (Transmitter)	1				1				1				1
16-bit Timer channels	8 + 4 (20 ns resolution)				4 + 4 (20 ns resolution)				8 + 4 (20 ns resolution)				4 + 4 (20 ns resolution)
16-bit PWM channels	4 + 4 (20 ns resolution)				4 + 3 (20 ns resolution)				4 + 4 (20 ns resolution)				4 + 3 (20 ns resolution)
ADC channels	16 (12-bit)				10 (12-bit)				16 (10-bit)				10 (10-bit)
8-bit DAC	1				1				-				-
ACMP 5V (with rail-to-rail inputs)	2				2				-				-
EVDD (20 mA source)	1				1				1				1
N-GPIO (25 mA sink)	4				4				4				4

Buy/Parametrics

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Design Resources

Design Files

Quick reference to our design files types.

2 design files

Receive the full breakdown. See the product footprint and more in the eCad file.

Symbols and Footprints
S12ZVC_64LQFP - CAD Symbol and PCB Footprint - BXL File

ZIPRev 0Jun 27, 2019 14:44:00121.1 KBMCS912ZVC12F0WLHR
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Symbols and Footprints
S12ZVC_48LQFP - CAD Symbol and PCB Footprint - BXL File

ZIPRev 0Jun 27, 2019 14:44:0098.2 KBS912ZVC12F0MLFR
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