NVT2001; NVT2002 | NXP Semiconductors

Bidirectional Voltage Level Translator for Open-Drain and Push-Pull Applications

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Block Diagram

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NVT2001

NTSX2102 Block Diagram

NVT2002

NVT2002TL Block Diagram

Features

Key Features

  • Provides bidirectional voltage translation with no direction pin
  • Less than 1.5 ns maximum propagation delay
  • Allows voltage level translation between:
    • 1.0 V Vref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V Vref(B)
    • 1.2 V Vref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V Vref(B)
    • 1.8 V Vref(A) and 3.3 V or 5 V Vref(B)
    • 2.5 V Vref(A) and 5 V Vref(B)
    • 3.3 V Vref(A) and 5 V Vref(B)
  • Low 3.5 Ω ON-state connection between input and output ports provides less signal distortion
  • 5 V tolerant I/O ports to support mixed-mode signal operation
  • High-impedance An and Bn pins for EN = LOW
  • Lock-up free operation
  • Flow through pinout for ease of printed-circuit board trace routing
  • ESD protection exceeds 4 kV HBM per JESD22-A114 and 1000 V CDM per JESD22-C101

Buy/Parametrics

3 results

Include 1 NRND

Order

CAD Model

Status

Signal Application

Type VLT

Number of bits

VCC(A) (Min - Max)

VCC(B) (Min-Max)

Bandwidth (Max) (MHz)

Input Type (TTL, CMOS, Schmitt Trigger)

Output Type (Open Drain, 3-State, Push-Pull, Pass-gate)

Ambient Operating Temperature (Min to Max) (℃)

AEC-Q100 compliant

Package Type

Package Dimensions (LxWxZ (mm))

Budgetary Price excluding tax

Active

Open-drain, Push-pull signals

BiDirectional FET

2

1 to 3.6

1.8 to 5.5

33

CMOS

3-State, Pass-gate

-40 to 105

N

TSSOP8

3 x 3 x 1.1

1K @ US$0.20

Active

Open-drain, Push-pull signals

BiDirectional FET

2

1 to 3.6

1.8 to 5.5

33

CMOS

3-State, Pass-gate

-40 to 105

N

XSON8

3 x 2 x 0.5

1K @ US$0.26

Active

Open-drain, Push-pull signals

BiDirectional FET

2

1 to 3.6

1.8 to 5.5

33

CMOS

3-State, Pass-gate

-40 to 105

N

HXSON8

3 x 2 x 0.5

1K @ US$0.22

Documentation

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Hardware

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3 hardware offerings

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