Scalable Entry Level 32-bit Microcontroller (MCU) based on Arm® Cortex®-M0 Cores

Product Details

Features

System

Arm Cortex-M0 or Arm Cortex-M0+ processor, running at frequencies of up to 50 MHz
Arm Cortex-M0 or Arm Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
Serial wire debug
System tick timer

Memory

Up to 32 KB on-chip flash programming memory
8 KB SRAM
In-System programming (ISP) and In-Application programming (IAP) via on-chip bootloader software
Flash ISP commands can be issued via UART or C_CAN

Digital peripherals

Up to 40 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors
GPIO pins can be used as edge and level sensitive interrupt sources
High-current output driver (20 mA) on one pin
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus
Four general purpose counter/timers with a total of fou capture inputs and up to 13 match outputs.
Programmable windowed WatchDog Timer (WDT)

Analog peripherals

10-bit ADC with input multiplexing among 8 pins

Serial interfaces

UART with fractional baud rate generation, internal FIFO, and RS-485 support
Two SPI controllers with SSP features and with FIFO and multi-protocol capabilities
I²C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode
C_CAN controller. On-chip C_CAN and CANopen drivers included
On-chip, high-speed CAN transceiver (LPC11C22/C24 only)

Clock generation

12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock
Crystal oscillator with an operating range of 1 MHz to 25 MHz
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz
PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator
Clock output function with divider that can reflect the system oscillator clock, IRC, CPU clock, and the Watchdog clock

Power control

Integrated PMU (Power management unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes
Power profiles residing in boot ROM allowing to optimize performance and minimize power consumption for any given application through one simple function call
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the GPIO pins
Power-On reset (POR)
Brownout detect with up to four separate thresholds for interrupt and forced reset

Additional features

Unique device serial number for identification
Single 3.3 V power supply (1.8 V to 3.6 V)
Available as 48-pin LQFP package

Buy/Parametrics

‌ ‌ ‌	‌ ‌	‌ ‌	‌ ‌	‌ ‌	‌ ‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌

Documentation

Quick reference to our documentation types.

1-5 of 16 documents

^{Data Sheet}
32-bit Arm Cortex-M0 microcontroller; 16/32 kB flash, 8 kB SRAM; C_CAN

PDFRev 3.2Jan 4, 2016558.1 KBLPC11CX2_CX4English
^{Application Note}
USBD Library for LPC1100 Series MCUs

ZIPRev 1.0Mar 14, 20188.9 MBTN00036English
^{Application Note}
LPC11Cxx CAN secondary bootloader

ZIPRev 1.0Dec 7, 20153.4 MBAN11772English
^{Application Note}
AES encryption and decryption software on LPC microcontrollers

ZIPRev 1.1Mar 17, 2014177.9 KBAN11241English
^{Application Note}
NXP LPC Cortex-M0 IEC60335 Class B library

ZIPRev 1.1Jan 24, 20142.6 MBAN11208English
^{Application Note}
Sensored BLDC motor control with LPC111x/LPC11Cxx

ZIPRev 1.0Aug 9, 20134.3 MBAN11094English
^{Application Note}
LPC11Cxx CANopen network demo

ZIPRev 1.0Aug 9, 20131.0 MBAN11238English
^{Application Note}
I2C secondary boot loader

ZIPRev 1.0Aug 9, 2013677.4 KBAN11258English
^{Application Note}
How to implement the PMBus software stack

ZIPRev 1.0Jul 22, 20131.1 MBAN11318English
^{Application Note}
SPI secondary boot loader

ZIPRev 1.0Jul 21, 2013653.2 KBAN11257English
^{Application Note}
UUencoding for UART ISP

PDFRev 1.0Jul 6, 2012142.1 KBAN11229English
^{User Guide}
LPC111x/LPC11Cxx User manual

PDFRev 12.5Aug 13, 20145.7 MBUM10398English
Sign in required
^Errata
Errata sheet LPC11C12/14/22/24

PDFRev 4.1Feb 24, 2016114.1 KBES_LPC11CXXEnglish
^{Package Information}
plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm

PDFRev 1.0Feb 8, 2016505.8 KBSOT313-2English
^{Training Presentation}
Driving the LPC11Cxx with Murata resonators

PDFRev 1.0May 16, 201235.4 KBR_10030English
^{Supporting Information}
ADC design guidelines

PDFRev 1.0May 9, 2014148.8 KBTN00009English

Show All

Design Resources

Design Files

Quick reference to our design files types.

5 design files

Receive the full breakdown. See the product footprint and more in the eCad file.

^Models
IBIS models for LPC11xx pkg HVQFN-33

ZIPRev 1Jun 13, 2017 16:19:0084.2 KBIBIS_LPC11xx_HVQFN-33
Sign in required
DownloadToggle Dropdown
- Add to Queue
- Remove from Queue
- Recommended for large file sizes.
- View Queue
^Models
IBIS models for LPC11xx pkg LQFP-48

ZIPRev 1Jun 13, 2017 16:19:0084.2 KBIBIS_LPC11xx_LQFP-48
Sign in required
DownloadToggle Dropdown
- Add to Queue
- Remove from Queue
- Recommended for large file sizes.
- View Queue
^{Symbols and Footprints}
LPC11Cxx ORCAD symbols

ZIPRev 0Jun 3, 2016 00:00:002.1 KBLPC11CXX-ORCAD-SYM
Sign in required
DownloadToggle Dropdown
- Add to Queue
- Remove from Queue
- Recommended for large file sizes.
- View Queue
^{Symbols and Footprints}
LPC11xx ORCAD symbols

ZIPRev 0Jun 3, 2016 00:00:002.9 KBLPC11XX-ORCAD-SYM
Sign in required
DownloadToggle Dropdown
- Add to Queue
- Remove from Queue
- Recommended for large file sizes.
- View Queue
^{Symbols and Footprints}
LPC11xx Eagle symbols

ZIPRev 0Jun 3, 2016 00:00:008.1 KBLPC11XX-EAGLE-SYM
Sign in required
DownloadToggle Dropdown
- Add to Queue
- Remove from Queue
- Recommended for large file sizes.
- View Queue