Design Files
Receive the full breakdown. See the product footprint and more in the eCad file.
The JN5148 is an ultra low power, high performance MCU combined with an IEEE802.15.4 compliant transceiver. It is targeted at low-power wireless networking applications, and features an enhanced 32-bit RISC processor offering high coding efficiency through variable width instructions, a multi-stage instruction pipeline and low power operation with programmable clock speeds and various sleep modes. The device comprises 128 kB of ROM, 128 kB of RAM, and a rich mix of analogue and digital peripherals. The large memory footprint allows the device to run both the networking stack, such as ZigBee PRO or NXP"s proprietary JenNet networking stack, and an embedded application or in a co-processor mode. The operating current is below 18 mA, allowing operation direct from a coin cell.
|
|
|
|
|
|
---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
2 documents
Please wait while your secure files are loading.
Receive the full breakdown. See the product footprint and more in the eCad file.
Receive the full breakdown. See the product footprint and more in the eCad file.