i.MX7ULP Ultra Low Power Processors Family

i.MX 7ULP Ultra Low Power Processors | Arm Cortex A7 | NXP Semiconductors

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The i.MX 7ULP family of processors represents NXP’s latest achievement in Ultra-Low-Power processing for use cases demanding long battery life. Targeted toward the growing market of portable devices, the i.MX 7ULP family of processors features NXP's advanced implementation of the Arm® Cortex®-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D Graphics Processing Units (GPUs). The i.MX 7ULP family provides up to 32-bit LPDDR2/LPDDR3 memory interface and a number of other interfaces for connecting peripherals, such as WLAN, Bluetooth®, GPS, displays and camera sensors.

i.MX 7 applications processors are part of NXP's EdgeVerse™ edge computing platform.

For additional information and sample availability, contact NXP Support.

Data Sheet

Reference Manual

Product Details

Block Diagram

i.MX 7ULP Applications Processors

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Features

Heterogeneous multicore Processing Architecture, Cortex-A7 and Cortex-M4 configuration
2D and 3D Graphics Processing Units (GPU)
External Memory Support: LPDDR2/LPDDR3
Flash Memory Support: Managed NAND (eMMC, eSD)
MIPI DSI Display Interface
Parallel Camera Interface
512 KB of total SRAM
Quad SPI (w/ On The Fly Decryption)
Communication Ports (I²C, SAI, UART, SPI, SDIO, USB)

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Product Programs

EdgeLock® Assurance

The i.MX 7ULP applications processor, part of the EdgeLock Assurance program, is designed to meet industry standards and follows NXP's security-by-design approach.

Buy/Parametrics

Part Show description	Order	Status	Core: Number of cores (SPEC)	Core Type	Operating Frequency [Max] (MHz)	L2 Cache (Max) (KB)	SRAM (kB)	External Memory Supported	GPU 2D / GPU 3D	Video/Display features	USB Controllers	Serial Communication	Audio Specific Modules	Package Type	Package Termination Count	Package Pitch (mm)	Junction Temperature (Min) (℃)	Junction Temperature (Max) (℃)
MCIMX7U3CVP06SD Data Sheet		Active	1	Arm Cortex-A7	650	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	—	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	LFBGA393	393	0.5	-40	105
MCIMX7U3DVK07SC Data Sheet	—	Active	1	Arm Cortex-A7	720	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	—	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	VFBGA361	361	0.5	0	95
MCIMX7U3DVK07SD Data Sheet		Active	1	Arm Cortex-A7	720	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	—	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	VFBGA361	361	0.5	0	95
MCIMX7U5CVP06SD Data Sheet		Active	1	Arm Cortex-A7	650	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	1x shader, Vivante GC321, Vivante GCNanoUltra	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	LFBGA393	393	0.5	-40	105
MCIMX7U5DVK07SD Data Sheet		Active	1	Arm Cortex-A7	720	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	1x shader, Vivante GC321, Vivante GCNanoUltra	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	VFBGA361	361	0.5	0	95
MCIMX7U5DVP07SD Data Sheet		Active	1	Arm Cortex-A7	720	256	256	FlexBus, LPDDR2 DRAM, LPDDR3 DRAM, QSPI	1x shader, Vivante GC321, Vivante GCNanoUltra	MIPI-DSI, VIU	2	4 x SPI, 8 x UART	SAI	LFBGA393	393	0.5	0	95

Design Resources

Design Files

Quick reference to our design files types.

4 design files

Models
i.MX 7ULP BSDL Model 10x10

BSDLRev 0May 14, 202450.0 KBMX7ULP1_10x10
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i.MX 7ULP IBIS Model – 10x10 VK package

ZIPRev 3Sep 3, 20202.2 MBimx7ulp_10x10_vk_v1_3b

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i.MX 7ULP IBIS Model – 14x14 VP package

ZIPRev 3Sep 3, 20202.2 MBimx7ulp_14x14_vp_v1_3b

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i.MX 7ULP BSDL Model 14x14

BSDLRev 0May 14, 202450.4 KBIMX7ULP1_14x14
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