i.MX 8X Family – Arm® Cortex®-A35, 3D Graphics, 4K Video, DSP, Error Correcting Code on DDR

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Block Diagram

i.MX 8X Processors

i.MX 8X Processors

Features

Processor Complex

  • 2x-4x Cortex-A35 cores
  • 1x Cortex-M4F core for real-time processing
  • 1x Tensilica® HiFi 4 DSP

Multimedia

  • 2x-4x Vec4-Shader GPU, OpenGL® ES 3.1, OpenCL 1.2 EP, OpenVG 1.1, Vulkan®
  • Video: 4K H.265 dec | 1080p H.264 enc / dec

Memory

  • 16/32-bit DDR3L-1866 and LPDDR4-2400
  • 1x Octal SPI or 2x Quad SPI
  • ECC Capabilities
    • Cortex-A35 L1 cache parity
    • Cortex-A35 L2 cache ECC
    • ECC Protection on DDR interface

Display and Cameras

  • 2x Combo MIPI DSI (4-lanes) / LVDS (1080p)
  • 24-bit Parallel display I/F (WXGA)
  • SafeAssure® Fail-over capable display
  • 1x 4-lane MIPI CSI2
  • 1x parallel 8-bit CSI (BT.656)

Connectivity

  • 2x SDIO3.0 [or 1x SDIO3.0 + 1x eMMC5.1]
  • USB 2.0 and 3.0 OTG support with PHY
  • 2x Ethernet AVB MAC
  • 3x CAN / CAN FD
  • MOST 25/50
  • PCIe 3.0 (1-lane) with L1 substate
  • 1x 12-bit ADC (6-channels)
  • 4x SPI, 1x ESAI, 4x SAI, 1x Keypad
  • 4x I²C (High-speed), 4x I²C (Low-speed)
  • 1x SPDIF

Security

  • High Assurance Boot, SHE
  • TRNG, AES-128, AES-256, 3DES, ARC4, RSA4096, SHA-1, SHA-2, SHA-256, MD-5
  • RSA-1024, 2048, 3072, 4096 and secure key storage
  • 10 Tamper-pins (active and passive)
  • Inline Encryption Engine (AES-128)

Temperature

  • Automotive AEC-Q100 Grade 3 (-40° to 125° C Tj)
  • Industrial (-40° to 105° C Tj)

Advance Power Management

  • Recommended PMIC: PF8200: Power Management integrated circuit for i.MX 8 and i.MX 8X families

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Documentation

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Design Files

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Hardware

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3 hardware offerings

Software

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

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To find additional partner offerings that support this product, visit our Partner Marketplace.

Training

14 trainings

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