i.MX 8ULP Applications Processor Family

i.MX 8ULP Applications Processor Family | NXP Semiconductors

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The i.MX 8ULP applications processor family brings ultra-low power processing and advanced integrated security with EdgeLock® secure enclave to the intelligent edge.

Optimizing energy at the chip level is becoming increasingly crucial for designing energy-efficient edge systems. NXP’s innovative Energy Flex architecture implementation in i.MX 8ULP processors uniquely combines heterogeneous domain computing, design techniques and process technology. A dedicated power management subsystem offers more than 20 power mode combinations to deliver exceptional efficiency across a range of applications.

Building on our strong history of security solutions, NXP’s EdgeLock secure enclave is pre-configured to simplify complex security implementations for faster time to market and help designers avoid costly configuration errors. The i.MX 8ULP processor has also achieved PSA and SESIP Level 2 certifications, enabling security for device manufactures at the design stage.

The i.MX 8ULP family features up to two Arm® Cortex®-A35 running at 800 MHz, an Arm Cortex-M33 core, 3D/2D Graphics Processing Units (GPUs) and a Cadence® Tensilica® HiFi 4 DSP and Fusion DSP for low-power audio/voice and edge AI/ML processing.

i.MX 8 applications processors are part of NXP's EdgeVerse™ edge computing platform.

Data Sheet

Reference Manual

Product Details

Block Diagram

i.MX 8ULP Applications Processors

Get diagram PDF

Features

CPU

Up to two Arm® Cortex®-A35 @ 800 MHz
Arm Cortex-M33 @ 216 MHz
Cadence® Tensillica® Hi-Fi 4 DSP @475 MHz for advanced audio, voice and ML processing and Fusion DSP @200 MHz for low-power voice and sensor hub processing
EdgeLock™ secure enclave
RISC-V powered Power Management Subsystem (µpower)

Memory

896 KB Total On Chip SRAM

External Memory

LPDDR3/LPDDR4/LPDDR4X
SPI-NOR
SPI-NAND

Graphics

3D GPU includes: Open GL® ES 3.1, OpenCL™ , Vulkan® and Open VG1.1
2D GPU
MIPI DSI (4-lane) with PHY
- Up-to 24-bit RGB (DBI/DPI)
Color EPD Display

Connectivity

10/100 Ethernet
FlexCAN

Display/Camera

MIPI CSI (2-lane) with PHY
(ISI) module interfaces: 1 pixel link source to obtain the image data for processing in its pipeline channels

Packaging

FCCSP 9.4 X 9.4 mm²
MAPBGA 15 x 15 mm²

Temperature Range

Industrial (-40 °C to 105 °C)
Commercial (0 °C to 95 °C)

EdgeLock® Secure Enclave

Building on its strong history of providing turnkey security solutions, NXP introduces the EdgeLock secure enclave, a pre-configured security subsystem that simplifies implementation of complex security technologies and helps designers avoid costly errors.

Buy/Parametrics

Part Show description	Order	Status	Core Type	Operating Frequency [Max] (MHz)	L2 Cache (Max) (KB)	External Memory Supported	GPU 2D / GPU 3D	Video/Display features	Ethernet Type	Audio Specific Modules	USB Controllers	Serial Communication	SRAM (kB)	CAN	Camera Interfaces	Security	ADC [Number, bits]	Package Type	Package Pitch (mm)	Junction Temperature (Min) (℃)	Junction Temperature (Max) (℃)
MIMX8UD3CVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	—	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	-40	105
MIMX8UD3DVK08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	—	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	VFBGA512	0.4	0	95
MIMX8UD3DVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	—	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	0	95
MIMX8UD5CVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	-40	105
MIMX8UD5DVK08SC Data Sheet	—	Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	VFBGA512	0.4	0	95
MIMX8UD5DVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	0	95
MIMX8UD7CVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	E-paper display, MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	-40	105
MIMX8UD7DVK08SC Data Sheet	—	Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	E-paper display, MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	VFBGA512	0.4	0	95
MIMX8UD7DVP08SC Data Sheet		Active	1 x Arm Cortex-M33, 2 x Arm Cortex-A35	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	Vivante GC520, Vivante GCNanoUltra31	E-paper display, MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	0	95
MIMX8US3CVP08SC Data Sheet		Active	1 x Arm Cortex-A35, 1 x Arm Cortex-M33	800	512	FlexSPI, LPDDR3 DRAM, LPDDR4 DRAM, OctalSPI, QSPI, SD3.0/eMMC5.1	—	MIPI-CSI, MIPI-DSI	100M, 10M	Fusion DSP, HiFi 4 DSP	2	3 x I3C, 6 x SPI, 8 x I²C, 8 x UART	64	1	1 x 2-Lane MIPI-CSI	AHAB, CAAM, CRC, NXP's EdgeLock Secure Enclave, OTFAD, TRNG	2 x 12	LFBGA485	0.5	-40	105