MPC574xB/C/G|32-bit MCU|Gateway | NXP Semiconductors

Ultra-Reliable MPC574xB/C/G MCUs for Automotive and Industrial Control and Gateway

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NXP MPC5748G Family Block diagram

NXP MPC5748G Family Block diagram

MPC574xB/C/G MCU BLOCK DIAGRAM

 MPC574xB/C/G MCU BLOCK DIAGRAM

Features

Performance

  • Up to 2 x Power Architecture e200z4 dual issue 32-bit cores
    • Up to 160 MHz operation
    • Single precision floating point operation
    • 8 KB instruction cache and 4 KB data cache
    • Variable length encoding (VLE) for significant code density improvement
  • Up to 1 x Power Architecture e200z2 single issue 32-bit core
    • Up to 80 MHz operation
    • Variable length encoding

Flash and SRAM

  • Up to 6 MB Flash memory with error correction coding (ECC)
    • Three port Flash controller
  • Up to 768 KB of SRAM with ECC
    • Three RAM ports

Connectivity and Communications

  • 10/100 Ethernet that supports 1588 and MII/RMII
    • Multiple queue AVB support
    • Optional 2nd 10/100 Ethernet module with Ethernet Switch
  • MediaLB (MLB150) supporting 3-pin and 6-pin interface and speed grades up to 2048 fs
  • One USB 2.0 Host (USBSPH) and one USB 2.0 Device (USBOTG) with ULPI support
  • One dual-channel FlexRay Controller with 128 message buffer
  • 18 LINFlex (1 xPrimary/Secondary, 17xPrimaries)
  • Eight enhanced FlexCAN modules with CAN FD support and configurable buffers
    • Each instance supports DMA on RxFIFO
    • Low-power mode with Pretended Networking support on a single FlexCAN module
  • One Secure Digital Hardware Controller (µSDHC) supporting Secure Digital Input Output (SDIO) and MMC
  • Four inter-IC communication interface (I²C) modules
  • Three Synchronous Audio Interface (SAI) capable of supporting six stereo audio channels
  • Four Deserial Peripheral Interface (DSPI) modules with additional features supporting external SPI controlled lamp/LED drives
  • Six Serial Peripheral Interface (SPI) modules

Low Power

  • Low-Power Unit (LPU) mode that allows e200z2 core to bypass the crossbar when in low power modes
    • Only a subset of the device is powered in LPU mode
  • Three analog comparators providing up to 24 compare inputs
    • Periodic monitoring routines can be fully handled in STANDBY mode
  • Pretended Networking support through advanced CAN filtering, wakeup capabilities and availability in LPU mode

Safety and Security

  • Hardware Security Module (HSM) enabling advanced security management
  • Designed to ISO 26262 process, targeting higher level ASIL systems
  • End-to-end Error Correction Coding (ECC)
  • User selectable Memory Built-In Self Test (MBIST) and Logic BIST (LBIST)
    • Can be enabled to run out of reset conditions, runtime and can be disabled
  • Fault Collection and Control Unit (FCCU) to collect faults and issue interrupts and reset depending on criticality
  • Voltage and clock monitors

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HLQFP176

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10K @ US$13.29 - 10K @ US$13.61

HLQFP176

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10K @ US$9.36

LBGA100

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10K @ US$10.29 - 10K @ US$10.58

LBGA100

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10K @ US$10.78 - 10K @ US$11.08

LBGA100

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10K @ US$10.29

LBGA100

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